1. Field of the Invention
The present invention relates to a timing restoration circuit in a pulse amplitude modulation-type (hereinafter, called PAM-type) communication system, and more particularly, to an improved PAM-type timing restoration circuit which is capable of effectively preventing interference between a plurality of receiving devices caused by a plurality of phase locked loops (hereinafter, called PLL) disposed in one chip when a plurality of channels are employed.
2. Description of the Prior Art
FIG. 1 is a schematic block diagram for a band-based PAM-type communication system according to the conventional art. As shown in this drawing, the PALM-type communication system includes a pulse amplitude modulator 1 for pulse amplitude modulating an input signal (ak) and outputting the modulated signal as an analog signal s(t) to a transmission channel 2. An A/D converter 3 located on a receiving side of the channel 2 converts an analog signal r(t) transmitted through the channel 2 into a digital signal. A PLL 4 detects the phase of an output signal r(d) from the A/D converter 3 and to restore timing and varies an oscillating frequency fed back to the A/D converter 3 depending on the phase difference. An equalizer 5 receives the output signal r(d) from the A/D converter and removes noise generated in channel 2. A slicer 6 receives an output signal from the equalizer 5 and converts the signal into a signal ak identically-shaped to a signal from the transmission side.
FIG. 2 is a schematic block diagram for a band-based PAM-type communication system having a plurality of channels. As shown in this drawing, N communication systems shown in FIG. 1 are connected in parallel on each channel, and output signals (b.sup.1 k-b.sup.n k) from each communicating system are aligned through a parallel/serial converter 27 to be outputted as serial signals (Qk).
As shown in FIG. 1, the pulse amplitude modulator 1 on the transmission side pulse amplitude modulates an input signal (ak) to output an analog signal s(t), and on the receiving side, a signal r(t) inputted through the channel 2 is sampled as a digital signal r(d) through the A/D converter 3. Meanwhile, on the receiving side, to obtain a sampling signal of precise timing, the output signal r(d) from the A/D converter 3 is transmitted through the PLL 4 which serves as a timing restoration circuit and fed-back to the A/D converter 3.
Description will now be given of the operation of the PLL 4, referring to FIG. 3.
A phase/frequency detector 31A (hereinafter, called PFD) detects a phase/frequency difference between the output signal r(d) from the A/D converter 3 and the output signal of a voltage controlled oscillator (VCO) 34A, and a charge pump 32A pumps charge corresponding to the value of the detected phase/frequency difference (errors signal), where the level of a voltage corresponding to the phase/frequency difference is outputted from the charge pump and the noise in the voltage is eliminated by a loop filter 33A to be supplied to the VCO 34A. The VCO 34A outputs a signal having a frequency corresponding to the output of the loop filter 33A as an input to the phase/frequency detector 31A.
The above-described operation of phase/frequency detection and correction is repeatedly performed until a phase/frequency difference disappears.
Furthermore, after the noise generated in the channel is eliminated from the signal, r(d) is sampled through the A/D converter 3, r(d) passes through the equalizer 5 and a signal (ak) identically-shaped to the one from the transmission side is outputted through the slicer 6.
A band-based PAM-type communication system having one channel is evident, for example, from the above description. In the case of the band-based PAM-type communication system having N channels, as shown in FIG. 2, each communicating system is connected in parallel, respectively, and the paralleled signals (b.sup.1 k-b.sup.n k) are aligned through the parallel/serial converter 27 to be outputted as a series signals (Qk).
Here, since the band-based PAM-type communication system having N channels requires N PLLs 24A-24N, and N VCOs 32A-32N, as shown in FIG. 3, are used. The VCOs 32A-32N operate at the same frequency, resulting in the generation of interference among each other.
As described above, in embodying the conventional communicating system having a plurality of channels, VCOs using the same frequency are disposed in each PLL, causing interference between the VCOs, which prevents the PLLs from carrying out a normal locking operation and as a result from performing a normal timing restoration.